Job Description

Responsibilities:

• Oversee complex analog block and full-chip schematics
• Contribute to high-level layout floor-planning strategies
• Develop and integrate high-speed analog and mixed-signal circuits using cutting-edge CMOS/BiCMOS processes for use in high-performance mixed-signal SoCs
• Effectively convey requirements and resolve design issues with team members
• Perform design, simulation, modeling, analysis, documentation, and communication of integrated circuit IP
• Translate system-level specifications into applicable IC design parameters
• Test and troubleshoot analog IC designs used in measurement and testing environments
• Collaborate within a team to deliver results on time and in line with project timelines

Requirements:

• MSEE or PhD in Electrical Engineering with 14+ years of hands-on experience in RF and analog IC design, including demonstrated leadership in guiding teams through full-chip and complex analog macro development
• Capable of approaching designs from a top-down perspective, understanding how to effectively integrate blocks at the chip level
• Experienced in collaborating with layout engineers to perform top-level floor-planning
• Strong foundation in analog circuit design, with the ability to independently create a wide range of functional analog blocks
• Deep knowledge of CMOS and BiCMOS fabrication technologies
• Skilled in designing circuits for high-frequency and large-signal applications at the transistor level
• Solid understanding of RF principles such as impedance matching, transmission lines, and RF device behavior
• Knowledgeable in best practices for analog IC design, including techniques to reduce noise, mismatch, and signal interference, as well as ensuring ESD robustness
• Proven track record of designing analog blocks for mixed-signal SoCs from concept through to volume production
• Works well in collaborative environments, offering technical guidance, open communication, and teamwork to resolve design challenges
• Comfortable engaging with both internal stakeholders and external customers to communicate technical requirements
• Proficient in transistor-level design tools (e.g., Cadence Analog Artist), physical layout tools (e.g., Cadence Virtuoso), verification and extraction tools, and simulation/modeling tools (e.g., MATLAB, Verilog-AMS)
• Must be a U.S. citizen or hold permanent resident status

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